Fast and accurate real-time processing of data signals is desirable in general purpose digital signal processing, consumer electronics, industrial electronics, graphics and imaging, instrumentation, medical electronics, military electronics, communications and automotive electronics applications among others, to name a few broad technological areas. In general, video signal processing, such as real-time image processing of video signals, requires massive data handling and processing in a short time interval. Image processing is discussed by Davis et al. in Electronic Design, Oct. 31, 1984, pp. 207-218, and issues of Electronic Design for, Nov. 15, 1984, pp. 289-300, Nov. 29, 1984, pp. 257-266, Dec. 13, 1984, pp. 217-226, and Jan. 10, 1985, pp. 349-356.
In certain data processing applications such as video signal processing it is often desired to utilize digital filters such as finite impulse response (FIR) digital filters and infinite recursive response (IRR) digital filters. These filters can be emulated in the synchronous vector processor (SVP) in either the horizontal or vertical direction. When creating filter functions in the vertical direction line memories are required. These line memories can be emulated in the SVP by allocating memory space in the register files RF0 or RF1. In operation line memory devices "shift" their data over by one word each clock cycle. In the vertical filter case, this would be one horizontal line time. With the present synchronous vector processor, this shift may be done in software due to the programmability of the device. A drawback, however, is that each bit requires one clock cycle. Thus shifting five 8-bit line memories would require 40 clock cycles. This time may be reduced to one clock cycle if the shift is accomplished by offsetting the read/write pointer into the line memory area of the DRAM memory. The present invention illustrates this technique.